Debugging Makefile

How to debug make files
Published on September 25, 2019 under the tag debug, make

Makefiles can become pretty complicated and you can spend many hours trying to understand what’s going on in the build systems. Let’s create a basic make file.

OBJS := a.o b.o c.o
TARGET := app

%.o: %.c
	gcc -o $@ $<

$(TARGET): $(OBJS)
	ld -o $@ $^

let’s say we are not sure what’s inside the OBJS variable. We can add the following target to the makefile

print-%:
	@echo '$*=$($*)'
	@echo '  origin = $(origin $*)'
	@echo '  flavor = $(flavor $*)'
	@echo '   value = $(value  $*)'

and run

$ make print-OBJS
OBJS=a.o b.o c.o
  origin = file
  flavor = simple
  value = a.o b.o c.o

to get value of the variable.